Welcome to our blog about assembly level programming with 8086 microprocessor...
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Architecture: a brief intro

The 8086 CPU is divided into two independent functional units:
1. Bus Interface Unit (BIU)
2. Execution Unit (EU)

The BIU sends out data, fetches instructions from memory and reads/writes data from/to ports & memory. It handles the transfer of data and adresses on the buses for EU. 
The EU tells the BIU where to fetch these instructions or data from, decodes the instructions and executes them.

We shall briefly explain some of the key registers in 8086.

The Instruction Queue:
To implement any instruction first it is to be fetched, then decoded and then executed. The fetching of an instruction involves its address to be sent out to the system memory and then the memory sending back the instruction.
While the EU is busy decoding or executing certain instructions which do not need the buses, the BIU fetches next six instruction bytes and stores them in a first-in-first-out (FIFO) register set called queue.
The processor doesn't have to wait for the next instruction to be fetched as it is already made available in the queue registers. Thus, the speed of operation is enhanced.
This prefetching of next instruction while another instruction is still being executed is known as pipelining.

General-purpose Registers:

There are eight 8-bit general-purpose registers: AL, AH, BL, BH, CL, CH, DL and DH. These can be used for temporary storage of 8-bit data. They can also be used for storage for 16-bit data words as groups: AX register (AH and AL), BX register (BH and BL), CX register (CH and CL) and DX register (DH and DL).
Their exact functions will be encountered latter.


The 16-bit flag register of 8086 contains 9 active flags (six conditional & 3 control) , other 7 flags are undefined.
Conditional Flags: indicate certain condition that arises during the execution. They are controlled by the processor.
Control Flags: control certain operations of the processor. They are deliberately set/reset by the user.

Other Registers:
The Segment Registers- SS, DS, CS and ES, the pointer and index registers -BP, SP, SI and DI. and the Instruction Pointer (IP) will be discussed along with 8086 memory.

Reference/Source: Microprocessors and Interfacing by Douglas V Hall (TMH Publications)


The Flag Register (also called the Status Register) of the 8086 is a 16-bit register which has 9 active flags, other 7 flags are undefined.
Out of the 9 flags there are 6 conditional flags and 3 control flags.

Conditional Flags: They are set/reset by the processor to indicate certain condition that arises during the execution of a program.

Control Flags: they are deliberately set/reset by the programmer to control certain operations of the processor.
The functions of active flags are: